On the construction of a software architecture for nuclear systems on a crystal

Abstract

The article discusses how to build software architecture for multi-core systems on a chip (SoC), based on asymmetric and symmetric multiprocessing, the hypervisor. Asymmetric multiprocessing is a port for several operating systems on physically separate processor cores.  In symmetric multiprocessing in systems with core isolation, one OS is launched on several cores. OS SMP- system is ported without user intervention with a growing number of cores. Since all cores are managed by a single OS, message transfer between cores can occur at the L1 data cache level, providing faster communication with less jitter. Kernel isolation allows you to reserve a kernel for a hard real-time application, protecting it from the influence of other high-performance kernels, which for the software architecture allows you to select your operating system without creating low-level software when managing multiple operating systems. The hypervisor refers to a low-level software system. It manages several independent operating systems that are at a higher level. Developing multi-core systems-on-chip offerings focused on the embedded market are well suited for asymmetric multiprocessing configurations. This architecture is useful for developers who use the performance of a real-time operating system in combination with a diverse set of Linux kernel functions. The article discusses the software and hardware solutions contained in the XAPP1079 environment, which are required to run Linux on a single Zynq-7000 All Programmable system on a chip, and open source applications on the second core. Designing systems based on systems on a chip for high-performance and а real-time applications requires an optimal solution taking into account the factors: data transfer time; separation of the operating system. A system solution for high-performance and real-time applications using a symmetric multiprocessor processing architecture with kernel isolation provides low latency, jitter and real-time system operation, while maintaining software SoC scalability. Programmable logic integrated circuits containing multi-core subsystems have an efficient architecture with symmetric multiprocessing of data to ensure a compromise between the actual data transfer time and the low latency of their processing. The advantages of using symmetric multiprocessing manifest themselves if the load is distributed among several resources. In this case, the time required to complete the task is reduced. However, the performance gain brought about by a simple multiplication of the number of performers will not necessarily be linear. Some tasks should be performed only sequentially. Multi-core systems are able to process packages much more efficiently than single-core ones - but only if they are managed by optimized software. It is expedient to develop multi-core computing software, including an OS with support for symmetric and asymmetric multiprocessor data processing architectures, an embedded hypervisor, high-speed packet processing modules, and an exhaustive set of tools for the entire cycle of multi-core computing systems. The results of such development will find application in multiprocessor supercomputers and server applications, in terminal devices, access aggregators and basic devices - where the highest throughput is required.